Holo3-35B-A3B · OSWorld-Verified · 2×A6000 LIVE

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official Holo3-35B-A3B leaderboard runs: 82.56 / 78.15 % (mean 80.4) at the same 100-step budget · sibling run: NUC16 (CPU edge)

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idle

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Success rate by domain

GPU power (W) & GPU util — last ~3 h

Tasks

Engine bring-up — llama.cpp CUDA vs vLLM (evidence)

The four regimes, inverted — edge (NUC16) vs datacenter (2×A6000), live

Same model, same screenshot-only agent, same OSWorld tasks — read against the KV-cache four-regimes framework. On the edge the agent step is prefill-bound (re-prefilling the evicted context dominates), which is the whole reason the evict / no-evict / KV-optimum tradeoff exists. On the A6000 prefill collapses to ~1–2 s, the step becomes VM/environment-bound, and the KV-cache regime is moot (vLLM also has no prefix cache for this hybrid arch). The bottleneck — and the energy story — invert. Numbers update live from both runs' state feeds.

Same model, three devices — what changes and why

This run (2×RTX A6000, GDDR6 ~768 GB/s each) — the same hybrid qwen3_5_moe (Gated-DeltaNet × 256-expert MoE VLM) that limps on edge silicon simply works on discrete CUDA:

Why this comparison matters. NUC16 measures what a fanless edge box can do today; this run measures the same agent with the serving bottleneck removed — isolating model capability from serving physics. Score deltas between the two runs bound the quality cost of edge serving (quant + latency-induced behavior differences), while the step-latency/energy gap quantifies its price.